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<div class="header">
  <div class="headertitle"><div class="title">mpu_armv8.h</div></div>
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<div class="contents">
<div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno">    1</span><span class="comment">/******************************************************************************</span></div>
<div class="line"><a id="l00002" name="l00002"></a><span class="lineno">    2</span><span class="comment"> * @file     mpu_armv8.h</span></div>
<div class="line"><a id="l00003" name="l00003"></a><span class="lineno">    3</span><span class="comment"> * @brief    CMSIS MPU API for Armv8-M and Armv8.1-M MPU</span></div>
<div class="line"><a id="l00004" name="l00004"></a><span class="lineno">    4</span><span class="comment"> * @version  V5.1.0</span></div>
<div class="line"><a id="l00005" name="l00005"></a><span class="lineno">    5</span><span class="comment"> * @date     08. March 2019</span></div>
<div class="line"><a id="l00006" name="l00006"></a><span class="lineno">    6</span><span class="comment"> ******************************************************************************/</span></div>
<div class="line"><a id="l00007" name="l00007"></a><span class="lineno">    7</span><span class="comment">/*</span></div>
<div class="line"><a id="l00008" name="l00008"></a><span class="lineno">    8</span><span class="comment"> * Copyright (c) 2017-2019 Arm Limited. All rights reserved.</span></div>
<div class="line"><a id="l00009" name="l00009"></a><span class="lineno">    9</span><span class="comment"> *</span></div>
<div class="line"><a id="l00010" name="l00010"></a><span class="lineno">   10</span><span class="comment"> * SPDX-License-Identifier: Apache-2.0</span></div>
<div class="line"><a id="l00011" name="l00011"></a><span class="lineno">   11</span><span class="comment"> *</span></div>
<div class="line"><a id="l00012" name="l00012"></a><span class="lineno">   12</span><span class="comment"> * Licensed under the Apache License, Version 2.0 (the License); you may</span></div>
<div class="line"><a id="l00013" name="l00013"></a><span class="lineno">   13</span><span class="comment"> * not use this file except in compliance with the License.</span></div>
<div class="line"><a id="l00014" name="l00014"></a><span class="lineno">   14</span><span class="comment"> * You may obtain a copy of the License at</span></div>
<div class="line"><a id="l00015" name="l00015"></a><span class="lineno">   15</span><span class="comment"> *</span></div>
<div class="line"><a id="l00016" name="l00016"></a><span class="lineno">   16</span><span class="comment"> * www.apache.org/licenses/LICENSE-2.0</span></div>
<div class="line"><a id="l00017" name="l00017"></a><span class="lineno">   17</span><span class="comment"> *</span></div>
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno">   18</span><span class="comment"> * Unless required by applicable law or agreed to in writing, software</span></div>
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno">   19</span><span class="comment"> * distributed under the License is distributed on an AS IS BASIS, WITHOUT</span></div>
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno">   20</span><span class="comment"> * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.</span></div>
<div class="line"><a id="l00021" name="l00021"></a><span class="lineno">   21</span><span class="comment"> * See the License for the specific language governing permissions and</span></div>
<div class="line"><a id="l00022" name="l00022"></a><span class="lineno">   22</span><span class="comment"> * limitations under the License.</span></div>
<div class="line"><a id="l00023" name="l00023"></a><span class="lineno">   23</span><span class="comment"> */</span></div>
<div class="line"><a id="l00024" name="l00024"></a><span class="lineno">   24</span> </div>
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno">   25</span><span class="preprocessor">#if   defined ( __ICCARM__ )</span></div>
<div class="line"><a id="l00026" name="l00026"></a><span class="lineno">   26</span><span class="preprocessor">  #pragma system_include         </span><span class="comment">/* treat file as system include file for MISRA check */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00027" name="l00027"></a><span class="lineno">   27</span><span class="preprocessor">#elif defined (__clang__)</span></div>
<div class="line"><a id="l00028" name="l00028"></a><span class="lineno">   28</span><span class="preprocessor">  #pragma clang system_header    </span><span class="comment">/* treat file as system include file */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00029" name="l00029"></a><span class="lineno">   29</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00030" name="l00030"></a><span class="lineno">   30</span> </div>
<div class="line"><a id="l00031" name="l00031"></a><span class="lineno">   31</span><span class="preprocessor">#ifndef ARM_MPU_ARMV8_H</span></div>
<div class="line"><a id="l00032" name="l00032"></a><span class="lineno">   32</span><span class="preprocessor">#define ARM_MPU_ARMV8_H</span></div>
<div class="line"><a id="l00033" name="l00033"></a><span class="lineno">   33</span></div>
<div class="line"><a id="l00035" name="l00035"></a><span class="lineno">   35</span><span class="preprocessor">#define ARM_MPU_ATTR_DEVICE                           ( 0U )</span></div>
<div class="line"><a id="l00036" name="l00036"></a><span class="lineno">   36</span></div>
<div class="line"><a id="l00038" name="l00038"></a><span class="lineno">   38</span><span class="preprocessor">#define ARM_MPU_ATTR_NON_CACHEABLE                    ( 4U )</span></div>
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno">   39</span></div>
<div class="line"><a id="l00046" name="l00046"></a><span class="lineno">   46</span><span class="preprocessor">#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \</span></div>
<div class="line"><a id="l00047" name="l00047"></a><span class="lineno">   47</span><span class="preprocessor">  (((NT &amp; 1U) &lt;&lt; 3U) | ((WB &amp; 1U) &lt;&lt; 2U) | ((RA &amp; 1U) &lt;&lt; 1U) | (WA &amp; 1U))</span></div>
<div class="line"><a id="l00048" name="l00048"></a><span class="lineno">   48</span></div>
<div class="line"><a id="l00050" name="l00050"></a><span class="lineno">   50</span><span class="preprocessor">#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)</span></div>
<div class="line"><a id="l00051" name="l00051"></a><span class="lineno">   51</span></div>
<div class="line"><a id="l00053" name="l00053"></a><span class="lineno">   53</span><span class="preprocessor">#define ARM_MPU_ATTR_DEVICE_nGnRE  (1U)</span></div>
<div class="line"><a id="l00054" name="l00054"></a><span class="lineno">   54</span></div>
<div class="line"><a id="l00056" name="l00056"></a><span class="lineno">   56</span><span class="preprocessor">#define ARM_MPU_ATTR_DEVICE_nGRE   (2U)</span></div>
<div class="line"><a id="l00057" name="l00057"></a><span class="lineno">   57</span></div>
<div class="line"><a id="l00059" name="l00059"></a><span class="lineno">   59</span><span class="preprocessor">#define ARM_MPU_ATTR_DEVICE_GRE    (3U)</span></div>
<div class="line"><a id="l00060" name="l00060"></a><span class="lineno">   60</span></div>
<div class="line"><a id="l00065" name="l00065"></a><span class="lineno">   65</span><span class="preprocessor">#define ARM_MPU_ATTR(O, I) (((O &amp; 0xFU) &lt;&lt; 4U) | (((O &amp; 0xFU) != 0U) ? (I &amp; 0xFU) : ((I &amp; 0x3U) &lt;&lt; 2U)))</span></div>
<div class="line"><a id="l00066" name="l00066"></a><span class="lineno">   66</span></div>
<div class="line"><a id="l00068" name="l00068"></a><span class="lineno">   68</span><span class="preprocessor">#define ARM_MPU_SH_NON   (0U)</span></div>
<div class="line"><a id="l00069" name="l00069"></a><span class="lineno">   69</span></div>
<div class="line"><a id="l00071" name="l00071"></a><span class="lineno">   71</span><span class="preprocessor">#define ARM_MPU_SH_OUTER (2U)</span></div>
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno">   72</span></div>
<div class="line"><a id="l00074" name="l00074"></a><span class="lineno">   74</span><span class="preprocessor">#define ARM_MPU_SH_INNER (3U)</span></div>
<div class="line"><a id="l00075" name="l00075"></a><span class="lineno">   75</span></div>
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno">   80</span><span class="preprocessor">#define ARM_MPU_AP_(RO, NP) (((RO &amp; 1U) &lt;&lt; 1U) | (NP &amp; 1U))</span></div>
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno">   81</span></div>
<div class="line"><a id="l00089" name="l00089"></a><span class="lineno">   89</span><span class="preprocessor">#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \</span></div>
<div class="line"><a id="l00090" name="l00090"></a><span class="lineno">   90</span><span class="preprocessor">  ((BASE &amp; MPU_RBAR_BASE_Msk) | \</span></div>
<div class="line"><a id="l00091" name="l00091"></a><span class="lineno">   91</span><span class="preprocessor">  ((SH &lt;&lt; MPU_RBAR_SH_Pos) &amp; MPU_RBAR_SH_Msk) | \</span></div>
<div class="line"><a id="l00092" name="l00092"></a><span class="lineno">   92</span><span class="preprocessor">  ((ARM_MPU_AP_(RO, NP) &lt;&lt; MPU_RBAR_AP_Pos) &amp; MPU_RBAR_AP_Msk) | \</span></div>
<div class="line"><a id="l00093" name="l00093"></a><span class="lineno">   93</span><span class="preprocessor">  ((XN &lt;&lt; MPU_RBAR_XN_Pos) &amp; MPU_RBAR_XN_Msk))</span></div>
<div class="line"><a id="l00094" name="l00094"></a><span class="lineno">   94</span></div>
<div class="line"><a id="l00099" name="l00099"></a><span class="lineno">   99</span><span class="preprocessor">#define ARM_MPU_RLAR(LIMIT, IDX) \</span></div>
<div class="line"><a id="l00100" name="l00100"></a><span class="lineno">  100</span><span class="preprocessor">  ((LIMIT &amp; MPU_RLAR_LIMIT_Msk) | \</span></div>
<div class="line"><a id="l00101" name="l00101"></a><span class="lineno">  101</span><span class="preprocessor">  ((IDX &lt;&lt; MPU_RLAR_AttrIndx_Pos) &amp; MPU_RLAR_AttrIndx_Msk) | \</span></div>
<div class="line"><a id="l00102" name="l00102"></a><span class="lineno">  102</span><span class="preprocessor">  (MPU_RLAR_EN_Msk))</span></div>
<div class="line"><a id="l00103" name="l00103"></a><span class="lineno">  103</span> </div>
<div class="line"><a id="l00104" name="l00104"></a><span class="lineno">  104</span><span class="preprocessor">#if defined(MPU_RLAR_PXN_Pos)</span></div>
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno">  105</span>  </div>
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno">  111</span><span class="preprocessor">#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \</span></div>
<div class="line"><a id="l00112" name="l00112"></a><span class="lineno">  112</span><span class="preprocessor">  ((LIMIT &amp; MPU_RLAR_LIMIT_Msk) | \</span></div>
<div class="line"><a id="l00113" name="l00113"></a><span class="lineno">  113</span><span class="preprocessor">  ((PXN &lt;&lt; MPU_RLAR_PXN_Pos) &amp; MPU_RLAR_PXN_Msk) | \</span></div>
<div class="line"><a id="l00114" name="l00114"></a><span class="lineno">  114</span><span class="preprocessor">  ((IDX &lt;&lt; MPU_RLAR_AttrIndx_Pos) &amp; MPU_RLAR_AttrIndx_Msk) | \</span></div>
<div class="line"><a id="l00115" name="l00115"></a><span class="lineno">  115</span><span class="preprocessor">  (MPU_RLAR_EN_Msk))</span></div>
<div class="line"><a id="l00116" name="l00116"></a><span class="lineno">  116</span>  </div>
<div class="line"><a id="l00117" name="l00117"></a><span class="lineno">  117</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00118" name="l00118"></a><span class="lineno">  118</span></div>
<div class="line"><a id="l00122" name="l00122"></a><span class="lineno">  122</span><span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno">  123</span>  uint32_t RBAR;                   </div>
<div class="line"><a id="l00124" name="l00124"></a><span class="lineno"><a class="line" href="struct_a_r_m___m_p_u___region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8">  124</a></span>  uint32_t <a class="code hl_variable" href="struct_a_r_m___m_p_u___region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8">RLAR</a>;                   </div>
<div class="line"><a id="l00125" name="l00125"></a><span class="lineno">  125</span>} <a class="code hl_struct" href="struct_a_r_m___m_p_u___region__t.html">ARM_MPU_Region_t</a>;</div>
<div class="line"><a id="l00126" name="l00126"></a><span class="lineno">  126</span>    </div>
<div class="line"><a id="l00130" name="l00130"></a><span class="lineno">  130</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_Enable(uint32_t MPU_Control)</div>
<div class="line"><a id="l00131" name="l00131"></a><span class="lineno">  131</span>{</div>
<div class="line"><a id="l00132" name="l00132"></a><span class="lineno">  132</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaad8182e72fe5037a6ba1eb65a1554e0b">MPU</a>-&gt;CTRL = MPU_Control | <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gae72b283f6e38b641c877182f03d95844">MPU_CTRL_ENABLE_Msk</a>;</div>
<div class="line"><a id="l00133" name="l00133"></a><span class="lineno">  133</span><span class="preprocessor">#ifdef SCB_SHCSR_MEMFAULTENA_Msk</span></div>
<div class="line"><a id="l00134" name="l00134"></a><span class="lineno">  134</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;SHCSR |= <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaf084424fa1f69bea36a1c44899d83d17">SCB_SHCSR_MEMFAULTENA_Msk</a>;</div>
<div class="line"><a id="l00135" name="l00135"></a><span class="lineno">  135</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00136" name="l00136"></a><span class="lineno">  136</span>  <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#ga067d257a2b34565410acefb5afef2203">__DSB</a>();</div>
<div class="line"><a id="l00137" name="l00137"></a><span class="lineno">  137</span>  <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#gaad233022e850a009fc6f7602be1182f6">__ISB</a>();</div>
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno">  138</span>}</div>
<div class="line"><a id="l00139" name="l00139"></a><span class="lineno">  139</span></div>
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno">  142</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_Disable(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00143" name="l00143"></a><span class="lineno">  143</span>{</div>
<div class="line"><a id="l00144" name="l00144"></a><span class="lineno">  144</span>  <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#ga671101179b5943990785f36f8c1e2269">__DMB</a>();</div>
<div class="line"><a id="l00145" name="l00145"></a><span class="lineno">  145</span><span class="preprocessor">#ifdef SCB_SHCSR_MEMFAULTENA_Msk</span></div>
<div class="line"><a id="l00146" name="l00146"></a><span class="lineno">  146</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;SHCSR &amp;= <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaf084424fa1f69bea36a1c44899d83d17">~SCB_SHCSR_MEMFAULTENA_Msk</a>;</div>
<div class="line"><a id="l00147" name="l00147"></a><span class="lineno">  147</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00148" name="l00148"></a><span class="lineno">  148</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaad8182e72fe5037a6ba1eb65a1554e0b">MPU</a>-&gt;CTRL  &amp;= <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gae72b283f6e38b641c877182f03d95844">~MPU_CTRL_ENABLE_Msk</a>;</div>
<div class="line"><a id="l00149" name="l00149"></a><span class="lineno">  149</span>}</div>
<div class="line"><a id="l00150" name="l00150"></a><span class="lineno">  150</span> </div>
<div class="line"><a id="l00151" name="l00151"></a><span class="lineno">  151</span><span class="preprocessor">#ifdef MPU_NS</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00155" name="l00155"></a><span class="lineno">  155</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_Enable_NS(uint32_t MPU_Control)</div>
<div class="line"><a id="l00156" name="l00156"></a><span class="lineno">  156</span>{</div>
<div class="line"><a id="l00157" name="l00157"></a><span class="lineno">  157</span>  MPU_NS-&gt;CTRL = MPU_Control | <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gae72b283f6e38b641c877182f03d95844">MPU_CTRL_ENABLE_Msk</a>;</div>
<div class="line"><a id="l00158" name="l00158"></a><span class="lineno">  158</span><span class="preprocessor">#ifdef SCB_SHCSR_MEMFAULTENA_Msk</span></div>
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno">  159</span>  SCB_NS-&gt;SHCSR |= <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaf084424fa1f69bea36a1c44899d83d17">SCB_SHCSR_MEMFAULTENA_Msk</a>;</div>
<div class="line"><a id="l00160" name="l00160"></a><span class="lineno">  160</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00161" name="l00161"></a><span class="lineno">  161</span>  <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#ga067d257a2b34565410acefb5afef2203">__DSB</a>();</div>
<div class="line"><a id="l00162" name="l00162"></a><span class="lineno">  162</span>  <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#gaad233022e850a009fc6f7602be1182f6">__ISB</a>();</div>
<div class="line"><a id="l00163" name="l00163"></a><span class="lineno">  163</span>}</div>
<div class="line"><a id="l00164" name="l00164"></a><span class="lineno">  164</span></div>
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno">  167</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_Disable_NS(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno">  168</span>{</div>
<div class="line"><a id="l00169" name="l00169"></a><span class="lineno">  169</span>  <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#ga671101179b5943990785f36f8c1e2269">__DMB</a>();</div>
<div class="line"><a id="l00170" name="l00170"></a><span class="lineno">  170</span><span class="preprocessor">#ifdef SCB_SHCSR_MEMFAULTENA_Msk</span></div>
<div class="line"><a id="l00171" name="l00171"></a><span class="lineno">  171</span>  SCB_NS-&gt;SHCSR &amp;= <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaf084424fa1f69bea36a1c44899d83d17">~SCB_SHCSR_MEMFAULTENA_Msk</a>;</div>
<div class="line"><a id="l00172" name="l00172"></a><span class="lineno">  172</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00173" name="l00173"></a><span class="lineno">  173</span>  MPU_NS-&gt;CTRL  &amp;= <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gae72b283f6e38b641c877182f03d95844">~MPU_CTRL_ENABLE_Msk</a>;</div>
<div class="line"><a id="l00174" name="l00174"></a><span class="lineno">  174</span>}</div>
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno">  175</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00176" name="l00176"></a><span class="lineno">  176</span></div>
<div class="line"><a id="l00182" name="l00182"></a><span class="lineno">  182</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_SetMemAttrEx(<a class="code hl_struct" href="struct_m_p_u___type.html">MPU_Type</a>* mpu, uint8_t idx, uint8_t attr)</div>
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno">  183</span>{</div>
<div class="line"><a id="l00184" name="l00184"></a><span class="lineno">  184</span>  <span class="keyword">const</span> uint8_t reg = idx / 4U;</div>
<div class="line"><a id="l00185" name="l00185"></a><span class="lineno">  185</span>  <span class="keyword">const</span> uint32_t pos = ((idx % 4U) * 8U);</div>
<div class="line"><a id="l00186" name="l00186"></a><span class="lineno">  186</span>  <span class="keyword">const</span> uint32_t mask = 0xFFU &lt;&lt; pos;</div>
<div class="line"><a id="l00187" name="l00187"></a><span class="lineno">  187</span>  </div>
<div class="line"><a id="l00188" name="l00188"></a><span class="lineno">  188</span>  <span class="keywordflow">if</span> (reg &gt;= (<span class="keyword">sizeof</span>(mpu-&gt;MAIR) / <span class="keyword">sizeof</span>(mpu-&gt;MAIR[0]))) {</div>
<div class="line"><a id="l00189" name="l00189"></a><span class="lineno">  189</span>    <span class="keywordflow">return</span>; <span class="comment">// invalid index</span></div>
<div class="line"><a id="l00190" name="l00190"></a><span class="lineno">  190</span>  }</div>
<div class="line"><a id="l00191" name="l00191"></a><span class="lineno">  191</span>  </div>
<div class="line"><a id="l00192" name="l00192"></a><span class="lineno">  192</span>  mpu-&gt;MAIR[reg] = ((mpu-&gt;MAIR[reg] &amp; ~mask) | ((attr &lt;&lt; pos) &amp; mask));</div>
<div class="line"><a id="l00193" name="l00193"></a><span class="lineno">  193</span>}</div>
<div class="line"><a id="l00194" name="l00194"></a><span class="lineno">  194</span></div>
<div class="line"><a id="l00199" name="l00199"></a><span class="lineno">  199</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)</div>
<div class="line"><a id="l00200" name="l00200"></a><span class="lineno">  200</span>{</div>
<div class="line"><a id="l00201" name="l00201"></a><span class="lineno">  201</span>  ARM_MPU_SetMemAttrEx(<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaad8182e72fe5037a6ba1eb65a1554e0b">MPU</a>, idx, attr);</div>
<div class="line"><a id="l00202" name="l00202"></a><span class="lineno">  202</span>}</div>
<div class="line"><a id="l00203" name="l00203"></a><span class="lineno">  203</span> </div>
<div class="line"><a id="l00204" name="l00204"></a><span class="lineno">  204</span><span class="preprocessor">#ifdef MPU_NS</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00209" name="l00209"></a><span class="lineno">  209</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)</div>
<div class="line"><a id="l00210" name="l00210"></a><span class="lineno">  210</span>{</div>
<div class="line"><a id="l00211" name="l00211"></a><span class="lineno">  211</span>  ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);</div>
<div class="line"><a id="l00212" name="l00212"></a><span class="lineno">  212</span>}</div>
<div class="line"><a id="l00213" name="l00213"></a><span class="lineno">  213</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00214" name="l00214"></a><span class="lineno">  214</span></div>
<div class="line"><a id="l00219" name="l00219"></a><span class="lineno">  219</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_ClrRegionEx(<a class="code hl_struct" href="struct_m_p_u___type.html">MPU_Type</a>* mpu, uint32_t rnr)</div>
<div class="line"><a id="l00220" name="l00220"></a><span class="lineno">  220</span>{</div>
<div class="line"><a id="l00221" name="l00221"></a><span class="lineno">  221</span>  mpu-&gt;<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gaa800d44f4d3520cc891d7b8d711320c1">RNR</a> = rnr;</div>
<div class="line"><a id="l00222" name="l00222"></a><span class="lineno">  222</span>  mpu-&gt;<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga3e1c3c971bab068b1d4c689db3221b40">RLAR</a> = 0U;</div>
<div class="line"><a id="l00223" name="l00223"></a><span class="lineno">  223</span>}</div>
<div class="line"><a id="l00224" name="l00224"></a><span class="lineno">  224</span></div>
<div class="line"><a id="l00228" name="l00228"></a><span class="lineno">  228</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_ClrRegion(uint32_t rnr)</div>
<div class="line"><a id="l00229" name="l00229"></a><span class="lineno">  229</span>{</div>
<div class="line"><a id="l00230" name="l00230"></a><span class="lineno">  230</span>  ARM_MPU_ClrRegionEx(<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaad8182e72fe5037a6ba1eb65a1554e0b">MPU</a>, rnr);</div>
<div class="line"><a id="l00231" name="l00231"></a><span class="lineno">  231</span>}</div>
<div class="line"><a id="l00232" name="l00232"></a><span class="lineno">  232</span> </div>
<div class="line"><a id="l00233" name="l00233"></a><span class="lineno">  233</span><span class="preprocessor">#ifdef MPU_NS</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00237" name="l00237"></a><span class="lineno">  237</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_ClrRegion_NS(uint32_t rnr)</div>
<div class="line"><a id="l00238" name="l00238"></a><span class="lineno">  238</span>{  </div>
<div class="line"><a id="l00239" name="l00239"></a><span class="lineno">  239</span>  ARM_MPU_ClrRegionEx(MPU_NS, rnr);</div>
<div class="line"><a id="l00240" name="l00240"></a><span class="lineno">  240</span>}</div>
<div class="line"><a id="l00241" name="l00241"></a><span class="lineno">  241</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00242" name="l00242"></a><span class="lineno">  242</span>   </div>
<div class="line"><a id="l00249" name="l00249"></a><span class="lineno">  249</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_SetRegionEx(<a class="code hl_struct" href="struct_m_p_u___type.html">MPU_Type</a>* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)</div>
<div class="line"><a id="l00250" name="l00250"></a><span class="lineno">  250</span>{</div>
<div class="line"><a id="l00251" name="l00251"></a><span class="lineno">  251</span>  mpu-&gt;<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gaa800d44f4d3520cc891d7b8d711320c1">RNR</a> = rnr;</div>
<div class="line"><a id="l00252" name="l00252"></a><span class="lineno">  252</span>  mpu-&gt;<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gac953770d38a7d322b971d93eb8a5b062">RBAR</a> = rbar;</div>
<div class="line"><a id="l00253" name="l00253"></a><span class="lineno">  253</span>  mpu-&gt;<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga3e1c3c971bab068b1d4c689db3221b40">RLAR</a> = rlar;</div>
<div class="line"><a id="l00254" name="l00254"></a><span class="lineno">  254</span>}</div>
<div class="line"><a id="l00255" name="l00255"></a><span class="lineno">  255</span>   </div>
<div class="line"><a id="l00261" name="l00261"></a><span class="lineno">  261</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)</div>
<div class="line"><a id="l00262" name="l00262"></a><span class="lineno">  262</span>{</div>
<div class="line"><a id="l00263" name="l00263"></a><span class="lineno">  263</span>  ARM_MPU_SetRegionEx(<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaad8182e72fe5037a6ba1eb65a1554e0b">MPU</a>, rnr, rbar, rlar);</div>
<div class="line"><a id="l00264" name="l00264"></a><span class="lineno">  264</span>}</div>
<div class="line"><a id="l00265" name="l00265"></a><span class="lineno">  265</span> </div>
<div class="line"><a id="l00266" name="l00266"></a><span class="lineno">  266</span><span class="preprocessor">#ifdef MPU_NS</span><span class="preprocessor">   </span></div>
<div class="line"><a id="l00272" name="l00272"></a><span class="lineno">  272</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)</div>
<div class="line"><a id="l00273" name="l00273"></a><span class="lineno">  273</span>{</div>
<div class="line"><a id="l00274" name="l00274"></a><span class="lineno">  274</span>  ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);  </div>
<div class="line"><a id="l00275" name="l00275"></a><span class="lineno">  275</span>}</div>
<div class="line"><a id="l00276" name="l00276"></a><span class="lineno">  276</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00277" name="l00277"></a><span class="lineno">  277</span></div>
<div class="line"><a id="l00283" name="l00283"></a><span class="lineno">  283</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_OrderedMemcpy(<span class="keyword">volatile</span> uint32_t* dst, <span class="keyword">const</span> uint32_t* __RESTRICT src, uint32_t len)</div>
<div class="line"><a id="l00284" name="l00284"></a><span class="lineno">  284</span>{</div>
<div class="line"><a id="l00285" name="l00285"></a><span class="lineno">  285</span>  uint32_t i;</div>
<div class="line"><a id="l00286" name="l00286"></a><span class="lineno">  286</span>  <span class="keywordflow">for</span> (i = 0U; i &lt; len; ++i) </div>
<div class="line"><a id="l00287" name="l00287"></a><span class="lineno">  287</span>  {</div>
<div class="line"><a id="l00288" name="l00288"></a><span class="lineno">  288</span>    dst[i] = src[i];</div>
<div class="line"><a id="l00289" name="l00289"></a><span class="lineno">  289</span>  }</div>
<div class="line"><a id="l00290" name="l00290"></a><span class="lineno">  290</span>}</div>
<div class="line"><a id="l00291" name="l00291"></a><span class="lineno">  291</span></div>
<div class="line"><a id="l00298" name="l00298"></a><span class="lineno">  298</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_LoadEx(<a class="code hl_struct" href="struct_m_p_u___type.html">MPU_Type</a>* mpu, uint32_t rnr, <a class="code hl_struct" href="struct_a_r_m___m_p_u___region__t.html">ARM_MPU_Region_t</a> <span class="keyword">const</span>* table, uint32_t cnt) </div>
<div class="line"><a id="l00299" name="l00299"></a><span class="lineno">  299</span>{</div>
<div class="line"><a id="l00300" name="l00300"></a><span class="lineno">  300</span>  <span class="keyword">const</span> uint32_t rowWordSize = <span class="keyword">sizeof</span>(<a class="code hl_struct" href="struct_a_r_m___m_p_u___region__t.html">ARM_MPU_Region_t</a>)/4U;</div>
<div class="line"><a id="l00301" name="l00301"></a><span class="lineno">  301</span>  <span class="keywordflow">if</span> (cnt == 1U) {</div>
<div class="line"><a id="l00302" name="l00302"></a><span class="lineno">  302</span>    mpu-&gt;<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gaa800d44f4d3520cc891d7b8d711320c1">RNR</a> = rnr;</div>
<div class="line"><a id="l00303" name="l00303"></a><span class="lineno">  303</span>    ARM_MPU_OrderedMemcpy(&amp;(mpu-&gt;<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gac953770d38a7d322b971d93eb8a5b062">RBAR</a>), &amp;(table-&gt;<a class="code hl_variable" href="struct_a_r_m___m_p_u___region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a>), rowWordSize);</div>
<div class="line"><a id="l00304" name="l00304"></a><span class="lineno">  304</span>  } <span class="keywordflow">else</span> {</div>
<div class="line"><a id="l00305" name="l00305"></a><span class="lineno">  305</span>    uint32_t rnrBase   = rnr &amp; ~(MPU_TYPE_RALIASES-1U);</div>
<div class="line"><a id="l00306" name="l00306"></a><span class="lineno">  306</span>    uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;</div>
<div class="line"><a id="l00307" name="l00307"></a><span class="lineno">  307</span>    </div>
<div class="line"><a id="l00308" name="l00308"></a><span class="lineno">  308</span>    mpu-&gt;<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gaa800d44f4d3520cc891d7b8d711320c1">RNR</a> = rnrBase;</div>
<div class="line"><a id="l00309" name="l00309"></a><span class="lineno">  309</span>    <span class="keywordflow">while</span> ((rnrOffset + cnt) &gt; MPU_TYPE_RALIASES) {</div>
<div class="line"><a id="l00310" name="l00310"></a><span class="lineno">  310</span>      uint32_t c = MPU_TYPE_RALIASES - rnrOffset;</div>
<div class="line"><a id="l00311" name="l00311"></a><span class="lineno">  311</span>      ARM_MPU_OrderedMemcpy(&amp;(mpu-&gt;<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gac953770d38a7d322b971d93eb8a5b062">RBAR</a>)+(rnrOffset*2U), &amp;(table-&gt;<a class="code hl_variable" href="struct_a_r_m___m_p_u___region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a>), c*rowWordSize);</div>
<div class="line"><a id="l00312" name="l00312"></a><span class="lineno">  312</span>      table += c;</div>
<div class="line"><a id="l00313" name="l00313"></a><span class="lineno">  313</span>      cnt -= c;</div>
<div class="line"><a id="l00314" name="l00314"></a><span class="lineno">  314</span>      rnrOffset = 0U;</div>
<div class="line"><a id="l00315" name="l00315"></a><span class="lineno">  315</span>      rnrBase += MPU_TYPE_RALIASES;</div>
<div class="line"><a id="l00316" name="l00316"></a><span class="lineno">  316</span>      mpu-&gt;<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gaa800d44f4d3520cc891d7b8d711320c1">RNR</a> = rnrBase;</div>
<div class="line"><a id="l00317" name="l00317"></a><span class="lineno">  317</span>    }</div>
<div class="line"><a id="l00318" name="l00318"></a><span class="lineno">  318</span>    </div>
<div class="line"><a id="l00319" name="l00319"></a><span class="lineno">  319</span>    ARM_MPU_OrderedMemcpy(&amp;(mpu-&gt;<a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#gac953770d38a7d322b971d93eb8a5b062">RBAR</a>)+(rnrOffset*2U), &amp;(table-&gt;<a class="code hl_variable" href="struct_a_r_m___m_p_u___region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a>), cnt*rowWordSize);</div>
<div class="line"><a id="l00320" name="l00320"></a><span class="lineno">  320</span>  }</div>
<div class="line"><a id="l00321" name="l00321"></a><span class="lineno">  321</span>}</div>
<div class="line"><a id="l00322" name="l00322"></a><span class="lineno">  322</span></div>
<div class="line"><a id="l00328" name="l00328"></a><span class="lineno">  328</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_Load(uint32_t rnr, <a class="code hl_struct" href="struct_a_r_m___m_p_u___region__t.html">ARM_MPU_Region_t</a> <span class="keyword">const</span>* table, uint32_t cnt) </div>
<div class="line"><a id="l00329" name="l00329"></a><span class="lineno">  329</span>{</div>
<div class="line"><a id="l00330" name="l00330"></a><span class="lineno">  330</span>  ARM_MPU_LoadEx(<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaad8182e72fe5037a6ba1eb65a1554e0b">MPU</a>, rnr, table, cnt);</div>
<div class="line"><a id="l00331" name="l00331"></a><span class="lineno">  331</span>}</div>
<div class="line"><a id="l00332" name="l00332"></a><span class="lineno">  332</span> </div>
<div class="line"><a id="l00333" name="l00333"></a><span class="lineno">  333</span><span class="preprocessor">#ifdef MPU_NS</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00339" name="l00339"></a><span class="lineno">  339</span>__STATIC_INLINE <span class="keywordtype">void</span> ARM_MPU_Load_NS(uint32_t rnr, <a class="code hl_struct" href="struct_a_r_m___m_p_u___region__t.html">ARM_MPU_Region_t</a> <span class="keyword">const</span>* table, uint32_t cnt) </div>
<div class="line"><a id="l00340" name="l00340"></a><span class="lineno">  340</span>{</div>
<div class="line"><a id="l00341" name="l00341"></a><span class="lineno">  341</span>  ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);</div>
<div class="line"><a id="l00342" name="l00342"></a><span class="lineno">  342</span>}</div>
<div class="line"><a id="l00343" name="l00343"></a><span class="lineno">  343</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00344" name="l00344"></a><span class="lineno">  344</span> </div>
<div class="line"><a id="l00345" name="l00345"></a><span class="lineno">  345</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00346" name="l00346"></a><span class="lineno">  346</span> </div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gaaaf6477c2bde2f00f99e3c2fd1060b01"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a></div><div class="ttdeci">#define SCB</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2044</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gaad8182e72fe5037a6ba1eb65a1554e0b"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gaad8182e72fe5037a6ba1eb65a1554e0b">MPU</a></div><div class="ttdeci">#define MPU</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2054</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gae72b283f6e38b641c877182f03d95844"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gae72b283f6e38b641c877182f03d95844">MPU_CTRL_ENABLE_Msk</a></div><div class="ttdeci">#define MPU_CTRL_ENABLE_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1587</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gaf084424fa1f69bea36a1c44899d83d17"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gaf084424fa1f69bea36a1c44899d83d17">SCB_SHCSR_MEMFAULTENA_Msk</a></div><div class="ttdeci">#define SCB_SHCSR_MEMFAULTENA_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:695</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___instruction_interface_html_ga067d257a2b34565410acefb5afef2203"><div class="ttname"><a href="group___c_m_s_i_s___core___instruction_interface.html#ga067d257a2b34565410acefb5afef2203">__DSB</a></div><div class="ttdeci">#define __DSB()</div><div class="ttdoc">Data Synchronization Barrier.</div><div class="ttdef"><b>Definition</b> cmsis_armcc.h:458</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___instruction_interface_html_ga671101179b5943990785f36f8c1e2269"><div class="ttname"><a href="group___c_m_s_i_s___core___instruction_interface.html#ga671101179b5943990785f36f8c1e2269">__DMB</a></div><div class="ttdeci">#define __DMB()</div><div class="ttdoc">Data Memory Barrier.</div><div class="ttdef"><b>Definition</b> cmsis_armcc.h:469</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___instruction_interface_html_gaad233022e850a009fc6f7602be1182f6"><div class="ttname"><a href="group___c_m_s_i_s___core___instruction_interface.html#gaad233022e850a009fc6f7602be1182f6">__ISB</a></div><div class="ttdeci">#define __ISB()</div><div class="ttdoc">Instruction Synchronization Barrier.</div><div class="ttdef"><b>Definition</b> cmsis_armcc.h:447</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga3e1c3c971bab068b1d4c689db3221b40"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga3e1c3c971bab068b1d4c689db3221b40">MPU_Type::RLAR</a></div><div class="ttdeci">__IOM uint32_t RLAR</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1550</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_gaa800d44f4d3520cc891d7b8d711320c1"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#gaa800d44f4d3520cc891d7b8d711320c1">MPU_Type::RNR</a></div><div class="ttdeci">__IOM uint32_t RNR</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1548</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_gac953770d38a7d322b971d93eb8a5b062"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#gac953770d38a7d322b971d93eb8a5b062">MPU_Type::RBAR</a></div><div class="ttdeci">__IOM uint32_t RBAR</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1549</div></div>
<div class="ttc" id="astruct_a_r_m___m_p_u___region__t_html"><div class="ttname"><a href="struct_a_r_m___m_p_u___region__t.html">ARM_MPU_Region_t</a></div><div class="ttdef"><b>Definition</b> mpu_armv7.h:183</div></div>
<div class="ttc" id="astruct_a_r_m___m_p_u___region__t_html_ab5d3a650dbffd0b272bf7df5b140e8a8"><div class="ttname"><a href="struct_a_r_m___m_p_u___region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8">ARM_MPU_Region_t::RLAR</a></div><div class="ttdeci">uint32_t RLAR</div><div class="ttdef"><b>Definition</b> mpu_armv8.h:124</div></div>
<div class="ttc" id="astruct_a_r_m___m_p_u___region__t_html_afe7a7721aa08988d915670efa432cdd2"><div class="ttname"><a href="struct_a_r_m___m_p_u___region__t.html#afe7a7721aa08988d915670efa432cdd2">ARM_MPU_Region_t::RBAR</a></div><div class="ttdeci">uint32_t RBAR</div><div class="ttdoc">The region base address register value (RBAR)</div><div class="ttdef"><b>Definition</b> mpu_armv7.h:184</div></div>
<div class="ttc" id="astruct_m_p_u___type_html"><div class="ttname"><a href="struct_m_p_u___type.html">MPU_Type</a></div><div class="ttdoc">Structure type to access the Memory Protection Unit (MPU).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1545</div></div>
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